Semidynamics

In this vendor showdown presentation, Iakovos Dimoulas introduces Semidynamics, a Barcelona-based company pursuing a fully European, sovereignty-focused AI compute rack built on European RISC-V silicon. The company began as a supplier of high-performance out-of-order 64-bit RISC-V CPU IP cores and contributed to the vector and tensor extensions essential for AI inference. It has since moved to building its own chips, recently announcing a tape-out at TSMC's three-nanometer node, among the first European tape-outs at that geometry, integrating many cores and memory controllers. Two architectural choices are emphasized: the Gazillion technology that hides memory latency, and the use of LPDDR commodity memory instead of HBM, easing supply availability and price pressure while enabling terabytes of memory per liquid-cooled one-U board and larger models, bigger KV caches, longer contexts, and more concurrent users per rack. The roadmap culminates in a full OCP reference rack pairing the accelerator boards with x86 CPUs or, for a fully European solution, Arm-based processors through an announced partnership with SiPearl, targeting market availability in roughly two years. The software stack is entirely open source, built on ONNX Runtime, vLLM, GCC, and LLVM for RISC-V, avoiding vendor lock-in and running Hugging Face models out of the box. In the question round he confirms I/O-coherent memory scaling to rack level and notes the RISC-V cores can boot Linux and perform FP64 HPC computation, not only AI inference.